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Verification Engineers

Job Description

Hiring IP/Subsystem Verification Engineers 3 to 5 years of experience in Design Verification.

NOTE:
The profile must cover the following points

Make sure that it should comply the following points while forwarding the Profile.


EXPERIENCE Summary:
EMPLOYMENT Summary:
TECHNICAL Skills:
PROJECTS Description:
EDUCATIONAL Qualification:

CTC:

ECTC:

NOTICE PERIOD:


PROJECTS Description must include

Project Name :
Project Description
Project Duration
Client Name:
Roles and Responsibilities

Summing all the Project Durations should be equal to No of yrs of experience

Education/Experience

  • Expert  in System Verilog , UVM/OVM for IP/SOC,
    • Knowledge of system-level ARM architecture including buses like
    AXI/AHB, DMA, DDR3/4, Ethernet, PCIe, SATA, MIPI, USB ,  or similar is required.

• Expert Knowledge in IP SOC Verification
• Expert at Verification - Coverage Driven Test Planning, Architecting
Environments, Verification Flow
• Functional coverage, and closure, 1-2 IP/SoC Verification projects
• Developing test plans,  UVM and C++ coding for test bench components
• Maintaining existing UVM / C++ test bench components
• Debugging the failures
• Functional coverage , code coverage planning, development and closure
• Excellent Debug skills
• Perl/shell scripting is good to have
Notice Period: immediate to 30 days Only

Job Summary

  • Join WhatsApp Group : Jobs in Bangalore
  • Published on: 2021-09-22 06:26:43
  • Last Employer Activity: 2022-02-03 08:48:16

About the Recruiter/Company

  • Company/Recruiter Name: Recruitment Specialist ~ Kamakshi tiwari
  • Details: This is Kamakshi tiwari working with Zigsaw as a Recruitment Specialist. I specialise in recruitment for Node JS Roles , Java , Go and Zoho, QA Automation & DevOps roles at Zigsaw. If you are looking for Jobs in the above domain OR for any query related to the above Job, kindly reach to me on Call and WhatsApp at 9404638832 OR E-mail your resume at kamakshi.tiwari@zigsaw.in

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